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Microprocessor MCQ Answers
This is the microprocessor mcq with 100% correct answers:
Q1. Which is of the following is true about STA instruction?
- It uses immediate addressing mode
- It is a 3-byte instruction
- It required three machine cycles
- Accumulator is loaded with the content of memory
Q2. DAA instruction is used to perform which type of addition?
- BCD addition
- Excess-3 addition
- Binary addition
- Octal addition
Q3. What does a loader do in a microprocessor?
- Converts hexadecimal code to binary
- Converts decimal to binary
- Increments the content of the program counter by 1
- Decodes an opcode
Q4. Suppose registers ‘A’ and ‘B’ contain 50H and 40H respectively. After instruction MOV A, B, what will be the contents of registers A and B?
- 40H, 40H
- 50H, 40H
- 50H, 50H
- 60H, 40H
Q5. For how many times per instruction, the content of the program counter is placed on the address bus?
- One time
- Two times
- Depends on the memory capacity of the processor
- Depends on the length of the instruction
Q6. Conditional instructions are independent of which of the following flag?
- Z
- AC
- CY
- P
Q7. Which of the following is not correct about HLT instruction?
- It is a machine control instruction
- It is used to start the execution of the program
- PC is disconnected from the address bus
- A reset interrupt is required to come out of halt state
Q8. When data required for instruction is present inside the register of a microprocessor then which of the following addressing mode is used?
- Indexed
- Register
- Relative
- Direct
Q9. Which of the following interfacing IC is a DMA controller?
- 8257/37
- 8155
- 8253/54
- 8279
Q10. Which of the following is a 2-word instruction set?
- LDA 2500H
- MOV A, B
- IN 01H
- JMP 2085H
Q11. Which of the following is a register-indirect addressing mode instruction set?
- LDA 2700H
- ADI 36H
- DAA
- LDAX B
Q12. Which is of the following is true about SPHL instruction?
- It uses indexed addressing mode
- It is a 3-byte instruction
- It requires three T-states
- Contents of HL pair is moved to SP
Q13. Which of the following is not a microprocessor?
- Z8000
- Motorola 6809
- Zilog Z8
- PIC1x
Q14. Which of the following is not a property of TRAP interrupt in microprocessor?
- It is a non-maskable interrupt
- It is of highest priority
- It uses edge-triggered signal
- It is a vectored interrupt
Q15. Which of the following is a property of RST 7.5 interrupt?
- It is a non-maskable interrupt
- It has 3rd highest priority
- It uses level-triggered signal
- Its vectored address is 003C H
Q16. Which of the following flag is used to mask INTR interrupt?
- zero flag
- auxiliary carry flag flag
- interrupt flag
- sign flag
Q17. Which of the following is a special-purpose register of microprocessor?
- Program counter
- Instruction register
- Accumulator
- Temporary register
Q18. Which of the following circuit is used as a special signal to demultiplex the address bus and data bus?
- Priority Encoder
- Decoder
- Address Latch Enable
- Demultiplexer
Q19. How many flip-flops are there in a flag register of 8085 microprocessor?
- 4
- 5
- 7
- 10
Q20. Which of the following flag condition is used for BCD arithmetic operations in microprocessor?
- Sign flag
- Auxiliary carry flag
- Parity flag
- Zero flag
Q21. Whenever a non-maskable interrupt occurs in 8085 microprocessor, which of the following data line contains the data?
- 2C H
- 3C H
- 36 H
- 24 H
Q22. What does a microprocessor understand after decoding opcode?
- Perform ALU operation
- Go to memory
- Length of the instruction and number of operations
- Go to the output device
Q23. How many address lines are present in 8086 microprocessor?
- 16
- 20
- 32
- 40
Q24. Which of the following is not a status flag in microprocessor?
- Overflow flag
- Direction flag
- Interrupt flag
- Index flag
Q25. Which of the following is not a condition flag?
- Trap flag
- Auxiliary carry flag
- Parity flag
- Zero flag
Q26. Which of the following register is not used in opcode fetch operations?
- Program counter
- Memory address register
- Memory data register
- Flag register
Q27. A memory connected to a microprocessor has 20 address lines and 16 data lines. What will be the memory capacity?
- 8 KB
- 2 MB
- 16 MB
- 64 KB
Q28. What is the word length of the Pentium-II microprocessor?
- 8-bit
- 32-bit
- 64-bit
- 16-bit
Q29. Which of the following is not true about 8085 microprocessor?
- It is an 8-bit microprocessor
- It is a 40 pin DIP chip
- It is manufactured using PMOS technology
- It has 16 address lines
Q30. Which of the following is a non-vectored input?
- TRAP
- RST-7.5
- RST-6.5
- INTR
Q31. Which of the following is true?
- Every instruction has two parts i.e. opcode and operands
- MOV B, C is a two-byte instruction
- MVI A, 90H is a three-byte instruction
- Maximum number of T-states possible for the execution of an instruction is 16
Q32. Which of the following addressing mode is used by 8085 microprocessor for array and list operations?
- Base-Register
- Direst
- Indexed
- Immediate
Q33. What is stored in the H & L general-purpose register?
- Opcode
- Address of memory
- Address of next instruction
- Temporary data
Q34. If a 90 GB memory has to be connected to a microprocessor, minimum how many address lines are required?
- 36
- 39
- 32
- 37
Q35. Which of the following is a software interrupt?
- TRAP
- INTR
- RST-6.5
- RST-5
Q36. What is the vectored address of RST-5?
- 0010 H
- 0032 H
- 0028 H
- 0030 H
Q37. Which of the following is true about stack pointer?
- Stack pointer contains the address of the top of the stack memory
- Stack pointer is an 8-bit register
- Stack pointer stores data permanently
- Stack pointer is initialized after stack operation
Q38. How many address lines are required to connect a 4 KB RAM to a microprocessor?
- 10
- 16
- 12
- 20
Q39. Which of the following is true about MOV A, B instruction?
- It means move the content of register A to register B
- It uses immediate addressing mode
- It doesn’t affect the flag register
- It is a 2-byte instruction
Q40. Which of the following is false about LDA instruction?
- It is a 3-byte instruction
- It uses indirect addressing mode
- It has 13 T-states
- It doesn’t affect any flags
Q41. What is Microprocessor?
- A multipurpose PLD that accepts binary data as input
- A multipurpose PLD that accepts an integer as input
- A multipurpose PLD that accepts whole numbers as input
- A multipurpose PLD that accepts prime numbers as input
Q42. Which of the following is correct about 8086 microprocessor?
- Intel’s first x86 processor
- Motrola’s first x86 processor
- STMICROELECTRONICS’s first x86 processor
- NanoXplore x86 processor
Q43. Which of the following is a type of microprocessor?
- CISC
- RISC
- EPIC
- All of the mentioned
Q44. The microprocessor of a computer can operate on any information if it is present in ______________ only.
- Program Counter
- Flag
- Main Memory
- Secondary Memory
Q45. Which of the following technology was used by Intel to design its first 8-bit microprocessor?
- NMOS
- HMOS
- PMOS
- TTL
Q46. Which of the following addressing method does the instruction, MOV AX,[BX] represent?
- register indirect addressing mode
- direct addressing mode
- register addressing mode
- register relative addressing mode
Q47. What is the word length of an 8-bit microprocessor?
- 8-bits – 64 bits
- 4-bits – 32 bits
- 8-bits – 16 bits
- 8-bits – 32 bits
Q48. In 8-bit microprocessor, how many opcodes are present?
- 246
- 278
- 250
- 256
Q49. Which of the following is not true about the address bus?
- It consists of control PIN 21 to 28
- It is a bidirectional bus
- It is 16 bits in length
- Lower address bus lines (AD0 – AD7) are called “Line number”
Q50. Which of the following is true about microprocessors?
- It has an internal memory
- It has interfacing circuits
- It contains ALU, CU, and registers
- It uses Harvard architecture
Q51. Which of the following is the correct sequence of operations in a microprocessor?
- Opcode fetch, memory read, memory write, I/O read, I/O write
- Opcode fetch, memory write, memory read, I/O read, I/O write
- I/O read, opcode fetch, memory read, memory write, I/O write
- I/O read, opcode fetch, memory write, memory read, I/O write
Q52. The ________ directive instructs the assembler to begin memory allocation for a segment/block/code from the stated address.
- GROUP
- OFFSET
- ORG
- LABEL
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